Banana Pi BPI-LM7 LGA core board design with Rockchip RK3588

BPI-3588-LGA spec
CPU	Quad Core [email protected] +Quad Core [email protected], 8nm
GPU	ARM Mali-G610 MP4 GPU,Support OpenGL ES3.2 / OpenCL 2.2 / Vulkan1.1
NPU	6 TOPS@INT8,Support INT4/INT8/INT16 mixed operation Support framework switching of TensorFlow/MXNet/PyTorch/Caffe
ISP	48-Megapixel ISP,It implements a lot of algorithm accelerators, such as HDR, 3A, LSC, 3DNR, 2DNR, sharpening, dehaze, fisheye correction, gamma correction and so on.
Encode&Decode	Decode：8K@60fps H.265/VP9/AVS2,8K@30fps H.264 AVC/MVC, 4K@60fps AV1, 1080P@60fps MPEG-2/-1/VC-1/VP8 Encode：8K@30fps H.265 / H.264
RAM	4GB/8GB/16GB（up to 32GB）64-bit LPDDR4/LPDDR4x, Defalut LPDDR4x 8GB
Flash	16GB/32GB/64GB/128GB/256GB eMMC, support MicroSD card slot, Defaut eMMC 32GB
Operating Systems	Android 12.0, Ubuntu 20.04, Ubuntu 22.04, Debian11, Buildroot, Armbian, Kylin OS
Power supply	4.0V
Interface Type	LGA 506pin
Size	45mm×50mm×4.5mm(top: 2.2mm+PCB: 1.2mm +bottom: 1.1mm)
Operating temperature	0℃ ~ 70℃
Storage temperature	-20℃ ~ 70℃

Category	Function	quantity	parameter
Video Input Interface	MIPI DC(DPHY/CPHY) combo PHY	2	Support to use DPHY or CPHY Each MIPI DPHY V2.0, 4lanes, 4.5Gbps per lane Each MIPI CPHY V1.1, 3lanes, 2.5Gsps per lane	Support camera input combination: 2 MIPI DCPHY + 4 MIPI CSI DPHY(2 lanes) 2 MIPI DCPHY + 1 MIPI CSI DPHY(4 lanes) + 2 MIPI CSI DPHY(2 lanes) 2 MIPI DCPHY + 2 MIPI CSI DPHY(4 lanes)
MIPI CSI DPHY	4	Each MIPI DPHY V1.2, 2lanes, 2.5Gbps per lane Support to combine 2 DPHY together to one 4lanes
DVP	≤1	One 8/10/12/16-bit standard DVP interface, up to 150MHz input data Support BT.601/BT.656 and BT.1120 VI interface Support the polarity of pixel_clk, hsync, vsync configurable
HDMI RX	1	HDMI 2.0 RX PHY, 4 lanes, no sideband channels Data rate support in HDMI 2.0 mode, 6Gbps down to 3.4Gbps Data rate support in HDMI 1.4 mode, 3.4Gbps down to 250Mbps Support HDCP2.3 and HDCP1.4
Display interface	HDMI/eDP TX interface	≤2	Support two HDMI/eDP TX combo interface, but HDMI and eDP can not work at the same time for each interface Support x1, x2 and x4 configuration for each interface Support up to 7680x4320@60Hz for HDMI TX, and 4K@60Hz for eDP Support HDCP2.3 for HDMI TX, and HDCP1.3 for eDP
DP TX	2	Support 2 DP TX 1.4a interface which combo with USB3.1 Gen1 Support up to 7680x4320@30Hz Support Single Stream Transport(SST) Support HDCP2.3, HDCP 1.3
MIPI DSI	2	Support 2 MIPI DPHY 2.0 or CPHY 1.1 interface Support 4 data lanes and 4.5Gbps maximum data rate per lane for DPHY Support 3 data trios and 2.0Gsps maximum data rate per trio for CPHY Support dual MIPI display: left-right mode, RGB(up to 10bit) format
BT.1120 video output	≤1	Support up to 1920x1080@60Hz, RGB(up to 8bit) format Up to 150MHz data rate
Audio Interface	I2S	≤4	I2S0/I2S1, 8 channels TX and 8 channels RX path, audio resolution from 16bits to 32bits, Sample rate up to 192KHz I2S2/I2S3, 2 channels TX and 2 channels RX path, audio resolution from 16bits to 32bits, Sample rate up to 192KHz Support up to 7680x4320@60Hz for HDMI TX, and 4K@60Hz for eDP Support HDCP2.3 for HDMI TX, and HDCP1.3 for eDP
SPDIF	≤2	Support two 16-bit audio data store together in one 32-bit wide location Support biphase format stereo audio data output
PDM	≤2	Up to 8 channels, Audio resolution from 16bits to 24bits, Sample rate up to 192KHz Support PDM master receive mode
Network interface	GMAC	≤2	Support 10/100/1000-Mbps data transfer rates with the RGMII interfaces Support both full-duplex and half-duplex operation
Connectivity interface	SDIO	≤1	Compatible with SDIO3.0 protocol 4-bit data bus widths
USB 2.0 Host	2	Compatible with USB 2.0 specification Supports high-speed(480Mbps), full-speed(12Mbps) and low-speed(1.5Mbps) mode
SATA	≤3	Support three SATA3.0 controller, Combo PIPE PHYs with PCIe2.1/USB3.1 Compatible with Serial ATA 3.1 and AHCI revision 1.3.1	Combo PIPE PHY0 support one of the following interfaces SATA PCIe2.1 Combo PIPE PHY1 support one of the following interfaces SATA PCIe2.1 Combo PIPE PHY2 support one of the following interfaces SATA PCIe2.1 USB3.1 Gen1
USB3.1 Gen1	≤3	Support USB3.1 Gen1,equal to USB3.2 Gen1 and USB3.0,up to 5Gbps datarate Embedded 2 USB3.1 OTG interfaces which combo with DP TX (USB3OTG_0 and USB3OTG_1) Embedded 1 USB3.1 Host interface which combo with Combo PIPE PHY2 (USB3OTG_2)
PCIe2.1	≤3	Compatible with PCI Express Base Specification Revision 2.1 Support 5Gbps data rate
PCIe3.0	≤4	Compatible with PCI Express Base Specification Revision 3.0 Support data rates: 2.5Gbps(PCIe1.1), 5Gbps(PCIe2.1), 8Gps(PCIe3.0) Support aggregation and bifurcation with 1x 4lanes, 2x 2lanes, 4x 1lanes and 1x 2lanes + 2x 1lanes
SPI	≤5	Support two chip-select output Support serial-master and serial-slave mode, software-configurable
I2C	≤9	Support 7bits and 10bits address mode Data on the I2C-bus can be transferred at rates of up to 100k bits/s in the Standard-mode, up to 400k bits/s in the Fast-mode
UART	≤10	Embedded two 64-byte FIFO for TX and RX operation respectively Support 5bit, 6bit, 7bit, 8bit serial data transmit or receive Support auto flow control mode for all UART
CAN	≤3	Support transmit or receive CAN standard frame, extended frame Support transmit or receive data frame, remote frame, overload frame, error frame and frame interval
Others interface	GPIO	Multiple	All of GPIOs can be used to generate interrupt Support configurable drive strength
ADC	≤8	8 single-ended input channels, up to 1MS/s sampling rate
PWM	≤16	Support 16 on-chip PWMs(PWM0~PWM15) with interrupt-based operation Optimized for IR application for PWM3, PWM7, PWM11, PWM15

¶ Overview

¶ Key Featurers

¶ Getting Start

¶ Hardware

¶ BPI-LM7 3588-LGA Core board spec

¶ BPI-LM7 3588 LGA Core board Function parameter

¶ BPI-LM7 Hardware Resources

¶ BPI-W3 Development Kit hardware Resources

¶ BPI-W3 for BPI-LM7 development kit

¶ Hardware Interface

¶ Development

¶ Easy to buy sample